Various sub-blocks of a central processing unit (CPU) used in mobile computing devices such as, for example, mobile telephones, personal digital assistants (PDAs), portable music players, and the like, may require access to a memory device.
Specifically, in order to perform a large number of functions efficiently, the CPU of a mobile computing device may include various associated sub-blocks, such as a baseband processing block, a game-related processing block, a camera-related processing block, a music-related processing block, and/or other processing blocks. In order to simultaneously perform two or more functions, such as to simultaneously perform a music function and a game function, and/or to simultaneously perform a call function and a camera function, the corresponding sub-blocks may need to simultaneously access a memory device.
A memory device may be designed to have multiple ports so as to accommodate multiple memory accesses, thereby enhancing the overall system performance. Specifically, when two sub-blocks simultaneously access the memory device, the memory device may have I/O data pins and address/command pins for each of the two sub-blocks.
In that case, the total number of I/O pins coupled to the memory device may increase and the power consumption of the system may increase accordingly.